Code impénétrable as Jiss
Find the functional equivalent
Find the high-level semantic (pseudo-code)
We need an automated tool easily supporting new architectures
Reimplement the semantic
addr 0x0 @asm "add %rax,%rbx"
label pc_0x0
T_t1:u64 = R_RBX:u64
T_t2:u64 = R_RAX:u64
R_RBX:u64 = R_RBX:u64 + T_t2:u64
R_CF:bool = R_RBX:u64 < T_t1:u64
R_OF:bool = high:bool((T_t1:u64 ^ ~T_t2:u64) & (T_t1:u64 ^ R_RBX:u64))
R_AF:bool = 0x10:u64 == (0x10:u64 & (R_RBX:u64 ^ T_t1:u64 ^ T_t2:u64))
R_PF:bool =
~low:bool(let T_acc:u64 := R_RBX:u64 >> 4:u64 ^ R_RBX:u64 in
let T_acc:u64 := T_acc:u64 >> 2:u64 ^ T_acc:u64 in
T_acc:u64 >> 1:u64 ^ T_acc:u64)
R_SF:bool = high:bool(R_RBX:u64)
R_ZF:bool = 0:u64 == R_RBX:u64
What is THE generic program that convert ASM to atomic operations ?
ret
Getting target map
000000: \xc3 .
qemu_ld_i64 tmp0,rsp,leq,$0x0
movi_i64 tmp11,$0x8
add_i64 tmp3,rsp,tmp11
mov_i64 rsp,tmp3
st_i64 tmp0,env,$0x80
exit_tb $0x0
end
But
And reimplement compiler optimizations
You will be faced with ancient compilers problems
Use a supported IR with native optimizations: LLVM
%Lgv1 = load i64* @rsp
%Ildq = inttoptr i64 %Lgv1 to i64*
%Ldq = load i64* %Ildq
%Oarith = add i64 %Lgv1, 8
store i64 %Oarith, i64* @rsp
store i64 %Ldq, i64* @rip
ret i64 0
We all waited it :
All the madness started here
Based on a very specific version of Qemu, updating will be hard (Aarch64 and Cpp)
aurelien.wailly () orange.com